1. Field of the Invention
This invention relates generally to semiconductor products manufacturing, and, more particularly, to a method and apparatus for performing control of critical dimension using a secondary etch process on semiconductor devices.
2. Description of the Related Art
The technology explosion in the manufacturing industry has resulted in many new and innovative manufacturing processes. Today's manufacturing processes, particularly semiconductor manufacturing processes, call for a large number of important steps. These process steps are usually vital, and therefore, require a number of inputs that are generally fine-tuned to maintain proper manufacturing control.
The manufacture of semiconductor devices requires a number of discrete process steps to create a packaged semiconductor device from raw semiconductor material. The various processes, from the initial growth of the semiconductor material, the slicing of the semiconductor crystal into individual wafers, the fabrication stages (etching, doping, ion implanting, or the like), to the packaging and final testing of the completed device, are so different from one another and specialized that the processes may be performed in different manufacturing locations that contain different control schemes.
Among the important aspects in semiconductor device manufacturing are RTA control, chemical-mechanical polishing (CMP) control, etching, and overlay control. Generally, after a photolithography process is performed on a semiconductor device, an etch process is performed on the semiconductor device for forming a plurality of sub-sections within a semiconductor device, such as a gate. As technology facilitates smaller critical dimensions for semiconductor devices, the need for reduction of errors increases dramatically.
Generally, process engineers currently analyze the process errors a few times a month. The results from the analysis of the process errors are used to make updates to process tool settings manually. Generally, a manufacturing model is employed to control the manufacturing processes. Some of the problems associated with the current methods include the fact that the process tool settings are only updated a few times a month. Furthermore, currently the process tool updates are generally performed manually. Many times, errors in semiconductor manufacturing are not organized and reported to quality control personal. Often, the manufacturing models themselves incur bias errors that could compromise manufacturing quality. Proper formation of sub-sections within a semiconductor device is important in proper performance of the manufactured semiconductor device. Critical dimensions of the sub-sections, such as poly-silicon gates, generally have to be within a predetermined acceptable margin of error for semiconductor devices to be within acceptable manufacturing quality.
Generally, a set of processing steps is performed on a lot of wafers on a semiconductor manufacturing tool called an exposure tool or a stepper, followed by processing of the semiconductor wafers in etch tools. The manufacturing tool communicates with a manufacturing framework or a network of processing modules. The manufacturing tool is generally connected to an equipment interface. The equipment interface is connected to a machine interface to which the etcher is connected, thereby facilitating communications between the stepper and the manufacturing framework. The machine interface can generally be part of an advanced process control (APC) system. The APC system initiates a control script based upon a manufacturing model, which can be a software program that automatically retrieves the data needed to execute a manufacturing process. Often, semiconductor devices are staged through multiple manufacturing tools for multiple processes, generating data relating to the quality of the processed semiconductor devices. Many times, errors can occur during the processing of semiconductor devices. These errors can cause appreciable inconsistencies in the critical dimensions of multiple parameters in the processed semiconductor devices. Furthermore, it is important to reduce errors to cause the critical dimensions of the parameters of the processed semiconductor device to be within acceptable tolerance margins.
The present invention is directed to overcoming, or at least reducing the effects of, one or more of the problems set forth above.